Logic (Sch. #0102-5139-04)

4.2.5

The Logic unit contains all the basic timing and gating circuits necessary to derive the precision time

base and to sequence the internal functions. Also, as part of this unit, are the display time generator,

reset gate and start-stop gating logic. For convenience of discussion, the logic unit will be considered to

consist of three basic sections: a Time Base Generator section, Start-Stop and Count Gate Generator

section, and a Display and Reset section. Throughout the text reference to Z numbers indicates the

particular IC unit under discussion with the dash number signifying a particular input or output.

A. Time Base Generator

The source of the internal time base generation is a crystal controlled 1 MHz oscillator Y1 and Q2. A

trimmer capacitor C11 is used for exact frequency setting. This adjustment is set at the factory and

will require only occasional resetting as aging of the components takes place. The output of the

oscillator feeds NAND gate IC Z12-12 and 13 where the signal is amplified and squared for

submission to the gating and scaler IC's. When using an external signal for the time base

generation, the 1 MHz crystal oscillator signal is gated off and is replaced by the signal connected to

the EXT. T. B. connector. This is accomplished by activating gate Z37-13 (Internal) or Z13-4

(External). Signal gates determine the proper selection of the signal to be fed to the Time Base Gate

Z14-2 as enabled by the setting of the function selector switch. The basic 1 MHz oscillator frequency

(and externally applied reference) is initially divided by 10 through Z16. Signal gates enable the

proper signal by application of a positive potential (Logic "1") to the NAND gate control input. The

desired clock frequency is selected by the setting of the X1, X10, X100, X1000 multiplier switch

which enables the proper output from the prescaler decade IC's Z17, Z18 and Z38 by applying a

positive signal to the appropriate section of gate Z15 or gate Z37-10.

Time Base gate Z14 will be opened when the count gate signal at pin 1 is high (discussed in Section

B following). With Z14-1 enabled, the pulses arriving at pin 2 of Z14 proceed into the decade scaler

system (Z19 through Z34). The count will continue to accumulate in the decade scalers until such

time as the Count Gate signal changes from high to low (see Timing Chart Fig. 4-1). This level

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